Notes
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1 Introduction 6
1.1 Cpr E 210 Review 6
1.1.1 Karnaugh Maps (K-Maps) 6
1.1.1.1 Example 7
1.1.2 FSM –
1.1.2.1 Example 9
1.1.3 TTL Review 11
1.1.3.1 TTL Datasheet 11
1.1.3.2 Sourcing vs. sinking 11
1.2 Introduction to Microcontrollers 11
1.2.1 Embedded Programming 13
1.2.1.1 Real-time software 13
1.2.2 Binary Review 13
1.2.2.1 Example 14
2 C Programming 15
2.1 Variable Names & Types 15
2.1.1 Arrays 16
2.1.1.1 Example 16
2.1.1.2 Multi-dimensional Arrays 16
2.1.1.3 Initializing Arrays 17
2.1.2 Strings 17
2.2 Variable manipulation 18
2.2.1 Bitwise Operators 18
2.2.1.1 Example 19
2.2.1.2 Example 19
2.2.1.3 Group Exercise 20
2.3 Boolean Flow Control 20
2.3.1 if, else if, else 21
2.3.1.1 Example 21
2.3.2 Comparison (Relational) – Numeric 22
2.4 Expressions & Bitwise Operations 23
2.4.1 Bit-testing 23
2.4.1.1 Example 23
2.4.1.2 Example 24
2.4.1.3 Group Exercise 24
2.5 Functions 25
2.5.1 Return Types 25
2.5.2 Parameters 25
2.5.3 Prototyping 25
2.5.3.1 Example 26
2.5.4 Calling a Function 26
2.5.4.1 Example 26
2.5.4.2 Passing Variables 26
2.5.5 Global vs. Local 27
2.6 Looping 28
2.6.1 Bit-masking 28
2.6.1.1 Example 28
2.6.1.2 Group Exercise 28
2.6.1.3 Example 28
2.6.2 For
2.6.2.1 Array access 29
2.6.3 While
2.6.4 Loop Control 30
2.6.5 Switch Statement 30
2.7 General Input/Output Statements 30
2.7.1 printf 30
2.7.2 sprintf 31
2.7.3 scanf 31
2.8 Compiler Statements 32
2.8.1 #include statement 32
2.8.2 #define statements 32
2.8.3 #ifdef statements 32
2.8.3.1 Example 1 33
2.8.3.2 Example 2 33
2.8.3.3 Group Exercise 33
2.9 Pointers 34
2.9.1 Using pointers 35
2.9.2 More on Pointers 35
2.9.3 Embedded Programming Example 36
2.9.4 Pointer Math 37
2.9.4.1 Example 37
2.9.4.2 Memory Dump Example 38
2.9.5 Array Notation 38
2.9.5.1 Group Exercise 39
2.9.6 Dynamic Memory Allocation 39
2.9.6.1 Use of sizeof 40
2.9.6.2 Example – Dynamic Memory Allocation 40
2.10 Typecasting 41
2.10.1 Example 41
2.11 Structs 42
2.11.1 Designing a struct 42
2.11.1.1 Group Exercise 43
2.12 Debugging Techniques 44
2.12.1 Printf 44
2.12.1.1 Sanity Checks 44
2.12.2 IDE - Integrated Development Environment 44
2.12.3 Other Tools 44
2.12.4 Problems with Debugging 44
3 Overview of Computer Architecture 45
3.1 Types of Buses 45
3.1.1 Connecting to a bus 46
3.2 CPU Registers 47
3.2.1 Register 47
3.2.2 CPU Organization 48
3.2.3 Program Execution 49
3.2.4 Data Registers 49
3.2.5 Other Registers 50
3.2.6 Temporary Storage 50
3.2.7 Condition Register 50
3.2.8 Summary of MPC555 Registers 51
3.3 Simplified Instruction Execution Cycle 51
3.3.1 How does sequencing of instructions work? 51
3.3.2 Source Code 51
3.3.2.1 Machine Language 52
3.3.2.2 Assembly Language 52
3.4 Instruction Set Architectures 53
3.4.1 CISC - Complex Instruction Set Computer 53
3.4.1.1 CISC rationale 53
3.4.1.2 Common characteristics of CISC 53
3.4.1.3 Advantages 53
3.4.1.4 Disadvantages 54
3.4.2 RISC - Reduced Instruction Set Computer 54
3.4.2.1 Characteristics of RISC 54
3.4.2.2 Advantages of RISC 55
3.4.2.3 Disadvantages 55
3.4.3 Why CISC or RISC? 56
4 PowerPC Assembly Language 56
4.1 Assembly Instructions 56
4.2 Assembly Terminology 57
4.3 Addressing Modes 57
4.3.1 Immediate Addressing 57
4.3.1.1 Example 58
4.3.2 Indexed Addressing 58
4.3.2.1 Example 58
4.3.3 Effective Address for a Load or Store
Instruction 58
4.4 Labels 64
4.4.1 Labels for Functions 64
4.5 Basic Assembly Instructions 65
4.5.1 Data Movement 65
4.5.1.1 Immediate Load 66
4.5.1.2 Memory Load 67
4.5.1.3 Memory Load – Arrays 69
4.5.1.4 Memory Store 70
4.5.2 Data Manipulation 72
4.5.2.1 Logical Operations 72
4.5.2.2 Group Exercise 73
4.5.2.3 Example 73
4.5.2.4 Math Operations 75
4.5.2.5 Example 75
4.5.2.6 Register-Memory Diagram of Example Solution 77
4.5.2.7 Shift Operations 77
4.5.2.8 Condition Register 78
4.5.2.9 Arithmetic and the Condition Register 78
4.5.3 Assembly Flow Control 79
4.5.3.1 Branching 80
4.5.3.2 Example 80
4.5.3.3 Comparison 81
4.5.3.4 Longer Example 83
4.5.3.5 Yet Another Example 84
4.5.3.6 Advanced Flow Control 86
4.5.3.7 Link Register 88
4.6 Subroutines 88
4.6.1 Stack 89
4.6.1.1 Examples 90
4.6.1.2 Push/Pop on PowerPC 93
4.6.1.3 Group Exercise 94
4.6.1.4 Temporary Storage 94
4.6.1.5 Stack Pointer – Review 95
4.6.1.6 Nested Subroutines 95
4.6.1.7 Global vs. Local Variables 96
4.6.1.8 Using the Stack for Local Variables 96
4.6.1.9 Example 97
4.6.1.10 Parameters 99
4.6.1.11 Group Exercise 99
4.6.1.12 Example 100
5 I/O Subsystems 108
5.1 A/D I/O Subsystem 109
5.1.1 Converting Analog to Digital 109
5.1.2 Terminology and Equations 110
5.1.3 ADC Implementation 110
5.1.3.1 Successive Approximation 110
5.1.4 ADC on the PowerPC 111
5.1.4.1 Lab Setup 112
5.1.4.2 Using the QADC64 112
5.1.4.3 Queued ADC 113
5.1.4.4 Programming
the ADC 115
5.1.4.5 Example 116
5.2 Interrupts 116
5.2.1 Terminology 116
5.2.2 Interrupt vs. Polling 117
5.2.3 More on Interrupts 118
5.2.4 Different Types of Interrupts 118
5.2.5 Vectors 119
5.2.6 More on Exceptions 119
5.2.7 Interrupt Handling 119
5.2.8 Interrupts and the Stack 120
5.2.9 Interrupt Activation 120
5.2.9.1 I/O Subsystem Setup 121
5.2.9.2 I/O Subsystem Operation 121
5.3 Periodic Interrupt Timer (PIT) 121
5.3.1 Configuring the PIT for Interrupt Operation 124
5.3.1.1 Example 125
5.3.2 Writing the ISR 126
5.3.2.1 Lab Code 126
5.4 MPC 555 Interrupt System 128
5.4.1 Initialization Steps 128
5.4.1.1 Step 1: Module Specific Initialization 128
5.4.1.2 Step 2: Level Assignment 129
5.4.1.3 Step 3: Enable Interrupt 129
5.4.1.4 Step 4: Set Appropriate Mask Bits in SIMASK 129
5.4.1.5 Final Step: Setting MSR[EE] and MSR[RI] Bits 129
5.4.2
Initialization
Code 130